Voltage regulators are circuits which have been employed for years by the electronic industry. More recently, they made their inception in non-volatile storage devices which comprise cells including MOS transistors with a floating gate terminal, such as memories of the EPROM, EEPROM and FLASH types. In fact, a reducing supply voltage, expanding integration scale, and growing amount of binary information to be stored in a single cell, lead to the need for read, write and erase signals controlled with greater accuracy.
A non-volatile storage system of the multi-level type is known from Patent Application EP 394,705. This includes a gate voltage generation circuit, shown in FIG. 4(a), which includes a clock pulse generator 40, a charge pump circuit 60, and a regulator circuit 100, all connected in cascade with one another. The circuit also includes a voltage control circuit 80 having its input connected to the output of the circuit 60 and its output connected to a stop terminal of the circuit 40. The voltage control circuit 80 includes a comparator 86 having a negative input connected to ground through a load resistor 84, and a positive input for receiving a data voltage signal which has a value in the 0 to 5 volts range. The voltage control circuit also includes a Zener diode 82 having a Zener voltage of 15 volts, a cathode connected to the input of the control circuit 80, and an anode connected to the negative input of the comparator 86. The output of the comparator 86 is connected to the output of the control circuit 80.
The operation of this gate voltage generation circuit follows readily from FIG. 4(b). Regulation is realized at a value equal to the combined data and Zener voltages. It should be noted, however, that during a cell reading operation, the 5 volt supply voltage VDD is applied to the gate of the memory cell, as shown in FIG. 9.
Another gate voltage generation circuit for use in non-volatile memories of the multi-level or the low supply voltage type is known from Patent Application EP 656,629. During the reading operation, the gate voltage is supplied by a charge pump circuit driven by an oscillator, and has a higher value than the system supply voltage to provide for an ample working margin between storage states. The resulting voltage is then regulated by a Zener diode, as shown in FIG. 3.
Both prior regulators are based on a highly accurate reference element including a Zener diode. Accordingly, the regulated voltage value is set at the designing stage, and cannot be changed either by the user or by the manufacturer at the EWS (Electrical Wafer Sort) stage, for example. Also, the Zener diodes are not always easy to integrate with CMOS technology.
In addition, the performance of memory cells changes over time, e.g. with temperature variations. Thus, for a given storage state and a given reading gate voltage value, the current flowing through a cell may take significantly different values. This typically requires the choice of large working margins.